iSoC provides free open access to the following resources:

1. Open core SNN hardware: two HLS-generated SNN accelerators are available in the Download section for free usage, experimentation and research: a spiking Multilayer Perceptron (MLP) and a MNIST based spiking CNN. Both SNN inference IP cores are described and used in publication [4] in the News section. The archive includes SD/MMC content to run a demo on ZedBoard. The MNIST SNN IP is the one used in the Demos section. You can use and / or redistribute the hardware under the terms of the CeCILL-C license. 
2. Open source CNN software: various C models for CNN inference are available in the Download section for free usage, experimentation and research. This code can be used to produce RTL IP cores that can be further integrated with a CPU system and fully implemented on programmable SoC FPGAs following Xilinx Vivado, Vivado HLS, and SDSoC methodologies. These projects include a two layer Multi Layer Perceptron (MLP), MNIST, GTSRB and CIFAR10 CNN topologies that have been implemented and experimented as described in publication [4] in the News section. The archive includes SD/MMC content to run a demo on ZedBoard. You can use, modify and / or redistribute the software under the terms of the CeCILL-C license. 

License agreement

The following projects are made available to the open source community under CeCILL-C license agreement in a way to keep iSoC original Intellectual Property ownership. This software is intended primarily for free usage, experimentation and research. (C) Copyright 2023 iSoC design – All Rights Reserved. http://www.cecill.info/